Publications

Refereed Conference Publications

MICRO '26
CXL AnySSD: A Composable CXL SSD Using a CXL Type-2 Device and Any SSDs
Yang Zhou, Houxiang Ji, Bikrant Sharma, Jiyuan Zhang, Yu Li, Linjie Ma, Jaeyong Lee, Myoungjun Chun, Jihong Kim, Sudarsun Kannan, and Nam Sung Kim.
OSDI '26
Oxbow: A Coordinated Architecture for Multi-component File Systems
Jongyul Kim, Jaehwan Lee, Inhoe Koo, Peizhe Liu, Jiyuan Zhang, Junho Ahn, Tianyin Xu, and Youngjin Kwon
[pdf]
OSDI '25
EMT: An OS Framework for New Memory Translation Architectures
Siyuan Chai*, Jiyuan Zhang*, Jongyul Kim, Alan Wang, Fan Chung, Jovan Stojkovic, Weiwei Jia, Dimitrios Skarlatos, Josep Torrellas, and Tianyin Xu
IEEE Micro Top Picks 2026 Honorable Mention
[pdf]
HotOS '25
Rethinking Tiered Storage: Talk to File Systems, Not Device Drivers
Jiyuan Zhang, Jongyul Kim, Chloe Alverti, Peizhe Liu, Weiwei Jia, and Tianyin Xu
[pdf]
ASPLOS '25
M5: Mastering Page Migration and Memory Management for CXL-based Tiered Memory Systems
Yan Sun, Jongyul Kim, Zeduo Yu, Jiyuan Zhang, Siyuan Chai, Michael Jaemin Kim, Hwayong Nam, Jaehyun Park, Eojin Na, Yifan Yuan, Ren Wang, Jung Ho Ahn, Tianyin Xu, Nam Sung Kim
[pdf]
ASPLOS '24
Direct Memory Translation for Virtualized Clouds
Jiyuan Zhang, Weiwei Jia, Siyuan Chai, Peizhe Liu, Jongyul Kim, and Tianyin Xu
[pdf]
PACT '23
HugeGPT: Storing Guest Page Tables on Host Huge Pages to Accelerate Address Translation
Weiwei Jia*, Jiyuan Zhang*, Jianchen Shan, Yiming Du, Xiaoning Ding and Tianyin Xu.
[pdf]
EuroSys '23
Making Dynamic Page Coalescing Effective on Virtualized Clouds
Weiwei Jia*, Jiyuan Zhang*, Jianchen Shan, and Xiaoning Ding.
[pdf]
ICSE '23
DeepVD: Toward Class-Separation Features for Neural Network
Wenbo Wang, Tien N. Nguyen, Shaohua Wang, Yi Li, Jiyuan Zhang, and Aashish Yadavally.
[pdf]
SoCC '22
Achieving Low Latency in Public Edges by Hiding Workloads Mutual Interference
Weiwei Jia, Jiyuan Zhang, Jianchen Shan, Jing Li, and Xiaoning Ding.
[pdf]

Refereed Journal Publications

IEEE TC '24
Effective Huge Page Strategies for TLB Miss Reduction in Nested Virtualization
Weiwei Jia*, Jiyuan Zhang*, Jianchen Shan, and Xiaoning Ding.

* = Co-lead author.